Daniel Lazkani Feferman

MSc. Candidate

fefer [at] dca.fee.unicamp.br

CV Lattes

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Short Bio

Daniel Lazkani Feferman is currently a researcher at INTRIG lab and a MSc. Candidate at University of Campinas (UNICAMP), holds a BSc. in Telecommunications engineering from Universidade Federal Fluminense (UFF) in 2016. From 2013-2015, he worked as a researcher at Laboratório Mídiacom in the SCIFI project using programs like MRTG, Nagios and Netflow to monitor the network performance and topology. From 2014-2015, he was an intern at the International Business Machines (IBM) working with compliance of systems and audits. In 2015, he was a sales/pre-sales intern at Gilat Satellite Networks with experience on network sizing, link budget and VSAT technology. From 2015-2016, he received a fully funded scholarship from the government of Brazil to study at the New York Institute of Technology (NYIT) and then to work as a researcher at the Illinois Institute of Technology (IIT) using CST Studio to simulate antennas for smartphones.

Research Interests
  • Software Defined Networking
  • Privacy loss
  • P4 language
Publications

Authors: Type:

2018

  • [PDF] P. G. Patra, F. R. Cesen, J. S. Vallejo, D. L. Feferman, L. Csikor, C. E. Rothenberg, and G. Pongrácz, “Towards a Sweet Spot of Dataplane Programmability, Portability and Performance: On the Scalability of Multi-Architecture P4 Pipelines,” IEEE JSAC issue on Scalability Issues and Solutions for Software Defined Networks, 2018.
    [Bibtex] 
    @article{gyanesh2018sweet,
Author={Pattam Gyanesh Patra and Fabricio Rodriguez Cesen and Juan Sebastian
Mejia Vallejo and Daniel Lazkani Feferman and Levente Csikor and
Christian Esteve Rothenberg and Gergely Pongr{\'a}cz},
Title={{Towards a Sweet Spot of Dataplane Programmability, Portability and
Performance: On the Scalability of {Multi-Architecture} {P4} Pipelines}},
Journal={{IEEE JSAC issue on Scalability Issues and Solutions for Software Defined
Networks}},
Address={USA},
Days={1},
Month={sep},
Year={2018}
}
  • [PDF] J. S. Mejia, D. Feferman, and C. E. Rothenberg, “Network address translation using a programmable dataplane processor,” in CSBC 2018 – 17º WPerformance (), 2018.
    [Bibtex] 
    @INPROCEEDINGS{mejia2018network,
AUTHOR={Mejia, Juan Sebastian and Feferman, Daniel and Rothenberg, Christian Esteve},
TITLE={Network Address Translation using a Programmable Dataplane
Processor},
BOOKTITLE={{CSBC 2018 - 17º WPerformance ()}},
ADDRESS={},
DAYS={23-24},
MONTH={jul},
YEAR={2018},
ABSTRACT={A short-time solution for problems facing the Internet
of IP address depletion and scaling in routing is the address reuse
solution placing Network Address Translators (NAT) at the borders of
stub domains. In this article, we propose an implementation of NAT
using Programming Protocol-Independent Packet Processors (P4)
language, taking advantage of its features such as target-agnostic
dataplane programmability. Through the MACSAD compiler, we generate a
software switch that achieves high performance with for different
hardware (H/W) and Software (S/W) platforms. The main contributions of
this paper relate to the performance evaluation results of the NAT
implementation using P4 language with MACSAD compiler.},
KEYWORDS={Avaliação de desempenho em redes de computadores;
Avaliação de desempenho em Internet do futuro},
URL={http://XXXXX/182002.pdf}
}
  • [PDF] D. L. Feferman, J. S. Mejia, N. F. Saraiva, and C. E. Rothenberg, “Uma Nova Revolucao em Redes: Programacao do Plano de Dados com P4,” in Escola Regional de Informátiva do Piauí (ERIPI), Teresina, Brazil, 2018.
    [Bibtex] 
    @inproceedings{feferman2018nova,
title={{Uma Nova Revolucao em Redes: Programacao do Plano de Dados com P4}},
author={Daniel Lazkani Feferman and Juan Sebastian Mejia and Nathan Franklin Saraiva and Christian Esteve Rothenberg },
booktitle = {{Escola Regional de Informátiva do Piauí (ERIPI), Teresina, Brazil}},
year={2018},
month= {8}
}