Gyanesh

P Gyanesh Kumar Patra

gyanesh [at] dca.fee.unicamp.br

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Short Bio


P. Gyanesh Kumar Patra is a Ph.D. candidate at University of Campinas, Brazil and works with Information & Networking Technologies Research & Innovation Group (INTRIG). He has around 5½ years of industry experience working on datacenter protocols like QCN & SPB, LLDP, middleware APIs of WiMax systems, L2-L4 network switches etc. During this time he worked at Samsung Lab at Suwon, South Korea and at Hewlett-Packard Procurve Lab. Currently, he is pursuing his thesis on building cross-platform software switch for programmable dataplanes. As part of his doctoral research, he worked as a Visiting Researcher for one semester at Ericsson Research, Hungary and as a Research Intern for 1 year at CpQD research institute at Brazil. 

Research Interests

Software-Defined Networking, Network Function Virtualization, Programmable Dataplane, P4 Language, High-Performance Dataplane, Packet Routing and Forwarding, Data Center Networks, Telecom networks.

Software
Demos
  • BB-Gen: A Packet Crafter for P4 Target Evaluation. F. Rodriguez, P. G. Patra, L. Csikor, C. Rothenberg, P. Vörös, S. Laki, and G. Pongrácz. In Acm sigcomm’18 demo and poster session, August 2018. [PDF] [Github]
  • MACSAD: An Exemplar Realization of Multi-Architecture P4 Pipelines. P. G. Patra, F. Rodriguez, J. Mejia, D. Feferman, C. Rothenberg and G. Pongrácz. In 5th P4 Workshop, June 2018. [PDF] [PPT] [Github]
  • BB-Gen: A Packet Crafter for Performance Evaluation of P4 Data Planes. Fabricio Rodriguez Cesen, Pattam Gyanesh Kumar Patra, Christian Esteve Rothenberg, Gergely Pongracz. In 5th P4 Workshop, June 2018. [PDF] [PPT] [Github]
  • BB-Gen: A Packet Crafter for Data Plane Evaluation. Fabricio Rodriguez Cesen, Pattam Gyanesh Kumar Patra, Christian Esteve Rothenberg. In Salão de Ferramentas, 36th Brazilian Symposium on Computer Networks and Distributed Systems (SBRC 2018), May 2018. [PDF] [PPT] [Video] [Github]
  • MACSAD: Multi-Architecture Compiler System for Abstract Dataplanes (aka Partnering P4 with ODP), P. Patra , C. Rothenberg , G. Pongrácz.  In Acm sigcomm’16 demo and poster session, August 2016. [PDF] [Github]

Publications

google scholar citations christian rothenberg

My papers…

Authors: Type:

2019

  • [PDF] S. K. Singh, C. E. Rothenberg, G. Patra, and P. Gergely, “Offloading Virtual Evolved Packet Gateway User PlaneFunctions to a Programmable ASIC,” in Proceedings of 1st acm conext workshop on emerging in-network computing paradigms, 2019.
    [Bibtex]
    @inproceedings{suneet2019encp,
    author = {Singh, Suneet Kumar and Rothenberg, Christian Esteve and Patra, Gyanesh and Gergely, Pongracz},
    title = {{Offloading Virtual Evolved Packet Gateway User PlaneFunctions to a Programmable ASIC}},
    booktitle = {Proceedings of 1st ACM CoNEXT Workshop on Emerging in-Network Computing Paradigms},
    series = {ENCP},
    year = {2019},
    numpages = {6},
    url = {},
    doi = {},
    publisher = {ACM},
    keywords = {P4, Low Latency applications, Robotic control}
    }

2018

  • [PDF] P. G. Patra, F. R. Cesen, J. S. Vallejo, D. L. Feferman, L. Csikor, C. E. Rothenberg, and G. Pongrácz, “Towards a Sweet Spot of Dataplane Programmability, Portability and Performance: On the Scalability of Multi-Architecture P4 Pipelines,” IEEE JSAC issue on Scalability Issues and Solutions for Software Defined Networks, 2018.
    [Bibtex]
    @article{gyanesh2018sweet,
    Author={Pattam Gyanesh Patra and Fabricio Rodriguez Cesen and Juan Sebastian
    Mejia Vallejo and Daniel Lazkani Feferman and Levente Csikor and
    Christian Esteve Rothenberg and Gergely Pongr{\'a}cz},
    Title={{Towards a Sweet Spot of Dataplane Programmability, Portability and
    Performance: On the Scalability of {Multi-Architecture} {P4} Pipelines}},
    Journal={{IEEE JSAC issue on Scalability Issues and Solutions for Software Defined
    Networks}},
    Address={USA},
    Days={1},
    Month={sep},
    Year={2018}
    }
  • [PDF] [DOI] F. R. Cesen, P. G. Patra, L. Csikor, C. Rothenberg, P. Vörös, S. Laki, and G. Pongrácz, “BB-Gen: A Packet Crafter for P4 Target Evaluation,” in ACM SIGCOMM’18 Demo and Poster Session, 2018.
    [Bibtex]
    @inproceedings{cesen2018bbgensigcomm,
    author = {Cesen, Fabricio Rodriguez and P. G. Patra and L. Csikor and C. Rothenberg
    and P. V\"or\"os and S. Laki and G. Pongr\'{a}cz},
    title = {{BB-Gen: A Packet Crafter for P4 Target Evaluation}},
    booktitle = {{ACM SIGCOMM'18 Demo and Poster Session}},
    isbn = {978-1-4503-5915-3/18/08},
    location = {Budapest, Hungary},
    numpages = {2},
    doi = {10.1145/3234200.3234229},
    year = {2018},
    }
  • [PDF] F. R. Cesen, G. P. Patra, C. E. Rothenberg, and G. Pongrácz, “Design, Implementation and Evaluation of IPv4/IPv6 Longest Prefix Match support in P4 Dataplanes,” in Csbc 2018 – 17º wperformane, 2018.
    [Bibtex]
    @INPROCEEDINGS{cesen2018design,
    AUTHOR={Cesen, Fabricio Rodriguez and Patra, P Gyanesh and Rothenberg, Christian Esteve and Pongr{\'a}cz, Gergely},
    TITLE={{Design, Implementation and Evaluation of IPv4/IPv6 Longest Prefix Match support in P4 Dataplanes}},
    BOOKTITLE={CSBC 2018 - 17º WPerformane },
    DAYS={23-24},
    MONTH={jul},
    YEAR={2018},
    KEYWORDS={Avaliação de desempenho em engenharia de software; Avaliação de desempenho em redes de computadores; Avaliação de desempenho em Internet do futuro}
    }
  • [PDF] F. R. Cesen, G. P. Patra, and C. E. Rothenberg, “BB-Gen: A Packet Crafter for Data Plane Evaluation,” in SBRC 2018 – Salão de Ferramentas “, 2018.
    [Bibtex]
    @INPROCEEDINGS{cesen2018bb,
    AUTHOR={Cesen, Fabricio Rodriguez and Patra, P Gyanesh and Rothenberg, Christian Esteve},
    TITLE={{BB-Gen: A Packet Crafter for Data Plane Evaluation}},
    BOOKTITLE={SBRC 2018 - Salão de Ferramentas }",
    DAYS={9-10},
    MONTH={may},
    YEAR={2018},
    KEYWORDS={Aplicações em redes; Desempenho, escalabilidade e confiabilidade; Especificação, validação e verificação de protocolos; Redes definidas por software},
    URL="http://www.sbrc2018."
    }

2017

  • [PDF] [DOI] P. G. Patra, C. E. Rothenberg, and G. Pongracz, “MACSAD: high performance dataplane applications on the move,” in 18th IEEE international conference on high performance switching and routing (HPSR), Campinas, SP, Brazil, 2017, p. 1–6.
    [Bibtex]
    @inproceedings{patra2017macsad,
    title={{MACSAD:} High performance dataplane applications on the move},
    author={Patra, Pattam Gyanesh and Rothenberg, Christian Esteve and Pongracz, Gergely},
    booktitle = {18th {IEEE} International Conference on High Performance Switching
    and Routing {(HPSR)}, {Campinas, SP, Brazil}},
    pages = {1--6},
    year = {2017},
    crossref = {DBLP:conf/hpsr/2017},
    url = {https://doi.org/10.1109/HPSR.2017.7968684},
    doi = {10.1109/HPSR.2017.7968684},
    timestamp = {Thu, 20 Jul 2017 09:13:14 +0200},
    biburl = {http://dblp.uni-trier.de/rec/bib/conf/hpsr/PatraRP17},
    bibsource = {dblp computer science bibliography, http://dblp.org}
    }

2016

  • [PDF] [DOI] P. G. Patra, C. E. Rothenberg, and G. Pongrácz, “MACSAD: Multi-Architecture Compiler System for Abstract Dataplanes (aka Partnering P4 with ODP),” in Proceedings of the ACM SIGCOMM conference, New York, NY, USA, 2016, p. 623–624.
    [Bibtex]
    @inproceedings{patra2016macsad,
    title={{MACSAD: Multi-Architecture Compiler System for Abstract Dataplanes (aka Partnering P4 with ODP)}},
    author={Patra, Pattam Gyanesh and Rothenberg, Christian Esteve and Pongr{\'a}cz, Gergely},
    booktitle = {Proceedings of the {ACM SIGCOMM} Conference},
    series = {SIGCOMM '16},
    year = {2016},
    isbn = {978-1-4503-4193-6},
    location = {Florianopolis, Brazil},
    pages = {623--624},
    numpages = {2},
    url = {http://doi.acm.org/10.1145/2934872.2959077},
    doi = {10.1145/2934872.2959077},
    acmid = {2959077},
    publisher = {ACM},
    address = {New York, NY, USA},
    keywords = {OpenDataPlane, P4, Software Defined Networking},
    }